Freescale Semiconductor /MK61F15 /DDR /CR48

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CR48

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0P1PRIRLX0 (0000)P2PRI00 (0000)P2PRI1

P2PRI1=0000, P2PRI0=0000

Description

DDR Control Register 48

Fields

P1PRIRLX

Port 1 Priority Relax

P2PRI0

Port 2 Priority 0 commands

0 (0000): Lowest

1 (0001): -----

14 (1110): -----

15 (1111): Highest

P2PRI1

Port 2 Priority 1 commands

0 (0000): Lowest

1 (0001): -----

14 (1110): -----

15 (1111): Highest

Links

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